There’s a lot going on in Embedded Day. This brief talk will let you know what to expect.
This talk will provide an overview of the University of Leicester’s new MSc in Reliable Embedded Systems.
You can join this highly-innovative new MSc programme at any time and study over a two-year period, on a part-time basis. While anyone is welcome to apply, the programme is primarily intended to be taken by working engineers who are in full-time employment.
The talk will summarise the content of the six modules which make up this programme, and will also discuss requirements for project work.
The talk will go on to explain the application and registration process for this programme, and the fee structure.
TTE Systems Ltd is a spin-out company from the Embedded Systems Laboratory at the University of Leicester. Building on University research conducted over a period of more than 12 years, the company manufactures and sells the RapidiTTy™ family of software development tools.
RapidiTTy™ tools are based on time-triggered (TT) technology. This talk will provide an overview of the benefits of using TT technology when creating reliable embedded systems: the talk will conclude with an introduction to the RapidiTTy™ family.
During this presentation, participants to learn more about the custom design services offered by TTE Systems.
This talk will also provide an overview of the facilities available in the University of Leicester’s state-of-the-art Embedded System Demonstrator Laboratory (ESDL). The talk will explain how your company can obtain a free half-day session in the ESDL (with full support provided by experienced University staff). This free session may - if you wish - involve use of the various demonstrator facilities in the ESDL.
During the rest of the day, participants will be able to discuss their own design challenges (without charge and without obligation).
Working in partnership with the University of Leicester can be effective for many companies. For example, many undergraduate and MSc students are interested in carrying out industry-based projects: this work can be of mutual benefit to both host companies and students.
The presentation by Dr Lisa Stocks will explore some of the many ways in which companies can work with the University of Leicester, through project work, Year-in-Industry placements, Knowledge-Transfer Partnerships, and sponsorship of PhD students and / or research projects.
There will be opportunities to ask questions and explore possible partnerships immediately after this presentation and over lunch.
Each Embedded Day includes two technical presentations from researchers in the Embedded Systems Laboratory at the University of Leicester. These talks emphasise practical, useful results (rather than blue-sky research), and explore the potential benefits of the techniques which are presented. There will an opportunity to ask questions after each talk.
Using design patterns to convert between event-triggered and time-triggered software architectures
The two main software architectures for embedded systems are time-triggered (TT) and event-triggered (ET). Many TT systems employ a time-triggered co-operative (TTC) approach to task scheduling. By contrast, ET systems usually employ a pre-emptive scheduling methodology.
The research study described in this talk is exploring ways in which systems which employ an ET architecture can be “migrated” to an equivalent TT architecture, in order to improve reliability. The approach followed in the study involves the use of “design patterns”.
The talk will explain what design patterns are, and will describe results obtained on the project to date.
High-speed and predictable communication with the Controller Area Network
The Controller Area Network (CAN) protocol - originally developed for distributed automotive applications in the 1980s - has previously proved to be extremely popular for the implementation of low-cost distributed systems. Whilst CAN has many features that make it suitable for such applications, it also has a number of well-discussed drawbacks; data transmission is limited to a fixed 8-byte payload at 1Mbps, and the hardware bit-stuffing mechanism and automatic retransmission scheme can act to severely decrease the predictability of a CAN network.
This research project has focused on developing a modified CAN-like protocol controller that can be implemented on a programmable-logic device such as an FPGA. The modified protocol controller can help to ameliorate many of the drawbacks of CAN, whilst operating – as closely as is possible – to the original protocol specification. The new protocol controller employs transient overclocking at bit rates up to 10 Mbps to increase information throughput, allows payloads of up to 1024 bytes, and employs a simple extension to the bit-stuffing mechanism - in conjunction with programmable message transmission delays and timeouts - to increase predictability..
Lunch will be provided (free of charge) for registered participants.
Over lunch there will be a poster display highlighting some of the research in embedded systems and related fields at the University of Leicester.
During a 90-minute hands-on session, you will have the chance to put theory into practice and try out some time-triggered architectures and RapidiTTy™ tools for yourself.
Everyone who attends the hands-on session will be eligible to receive a permanent (non-commercial) licence for a RapidiTTy™ product, which will allow them to explore the isses raised in the hands-on session in more detail after Embedded Day IV.
An opportunity to visit the ESDL, see the facilities available and talk to the staff involved with this facility.
You will also have the opportunity to book a free half-day session in this laboratory (if you wish to do so).