RapidiTTy® product suites allow developers to employ time-triggered architectures with a range of modern embedded platforms, including off-the-shelf microcontrollers, FPGAs and PC hardware. All suites use the same RapidiTTy® IDE, and moving your designs between targets is a straightforward process.
A growing range of RapidiTTy® toolboxes is now also available. These toolboxes offer additional benefits to users of RapidiTTy® tool suites.
When we say that a computer system has a “pure” time-triggered architecture we mean that we can determine in advance — before the system begins executing — exactly what it will do at every moment of time in which it is running.
This key feature is unique to TT systems. It has very significant implications for system developers.
For example, because we know exactly what the system should do, we can tell if it is working correctly. More specifically, we can create a “scheduler agent” which matches a particular design precisely. Usually, the scheduler agent will run on a separate processor (to ensure that it is as independent as possible). In many cases, the agent will operate by measuring the power consumption (only) from the main processor: this helps to maximise the separation between the monitored system and the monitoring system.

[Graphic by Kam L. Chan.]
Not all systems require a scheduler agent. However, where reliability is an important concern, use of a scheduler agents can help to add a “safety net” to your system design.
Support for scheduler agents will be provided in forthcoming RapidiTTy® toolboxes.
Please contact us to discuss how you can add support for our patent-pending “Non-Invasive Safety-Agent” technology to your system today.
A key advantage with TT architectures is that problems (caused by coding errors or hardware failure) can be detected very quickly.
For example, in a TT design we know when tasks should run and how long they should take to complete. In such designs a “task guardian” (TG) can be very useful. You can think of a TG as a form of “intelligent watchdog timer” which can be used to identify (and shut down) tasks which are running incorrectly.
[Figure by Zemian Hughes. Click to enlarge.]
Full (and automatic) support for the creation of task guardians will be provided in forthcoming RapidiTTy® toolboxes.
Please contact us to discuss how you can add support for task guardians to your system today.
TT techniques are very effective with both single-processor and multi-processor designs (including distributed systems and multi-core systems).
Using TT architectures with off-the-shelf protocols can have significant advantages. For example, the Controller Area Network (CAN) bus is currently used in automotive, industrial and medical systems. Because of its popularity, hardware support for this protocol is provided in many off-the-shelf microcontrollers. In most cases, CAN is considered to be suitable for use only in systems with — at best — a safety integrity level (SIL) of 1 (“SIL 1 systems”). Recent studies have demonstrated that through the appropriate use of TT techniques, systems can be produced with SIL 2 ratings (single-bus designs) or SIL 3 ratings (dual-bus designs).
Support for distributed systems will be provided in forthcoming RapidiTTy® toolboxes.
Please contact us to discuss how you can add support for our patent-pending distributed-system technology to your design today.