Time-triggered basics
What are TT architectures?
There are numerous ways in which we can describe (and distinguish) the different architectures which are employed when creating the firmware for embedded computer systems.
When we say that a computer system has a time-triggered architecture we mean that we can determine in advance — before the system begins executing — exactly what it will do at every moment of time in which it is running.
When implementing TT systems, the key thing we need to remember is the “one interrupt per CPU” rule. That’s right: TT designs only have one interrupt enabled. This single interrupt is usually linked to a timer “tick”, which might occur (for example) every millisecond. In a TT design, all other inputs (for example, inputs from switches) are polled.
Learning to design with “just one interrupt” may sound like a significant challenge, but — with appropriate tool support — it’s much easier than you may imagine (and has enormous benefits).
What are the benefits of using TT architectures?
Use of TT architectures in your system can provide the following benefits:
- Reduced development time
- Reduced testing time (and lower maintenance costs)
- Reduced unit costs
- Ease of certification
We consider each of these issues in turn below.
Reduced development time
The predictable nature of TT architectures means that TT designs can be assembled from components. This means that — using suitable component libraries — reliable systems can be created very quickly, even by developers without great experience in the creation of embedded software.
For example, our RapidiTTy™ Builder product provides support for the assembly of systems with a time-triggered (co-operative) architecture.
Reduced unit costs
Many companies find that use of TT architectures helps to reduce costs of production, not least because it reduces system resource requirements.
Reduced testing time (and lower maintenance costs)
TT designs tend to have a very simple architecture: this makes them easy to understand, and easy to maintain.
System testing also tends to be more straightforward with TT designs and, because of the simplicity of the architecture, maintenance costs can be substantially reduced too.
If your company is still using a conventional RTOS, ask yourself how many of your team really understand how this works, in detail (be honest). If your team don’t fully understand the 1000s of lines of code in your RTOS, can you be sure exactly how your system will operate in the field?
Ease of certification
Many systems for use in aerospace, medical or automotive sectors require certification.
Because of the predictable nature of TT designs, certification authorities (and company lawyers) tend to look favourably upon the use of this architecture in safety-critical and safety-related systems.
Can TT designs be created using off-the-shelf microcontrollers?
Most TT designs are currently implemented using off-the-shelf processors.
At this time, RapidiTTy™ Builder products supports the creation of firmware for processors with an ARM7® and Cortex-M3® cores. Support for ARM9® cores will be added shortly.
If you are interested in support for other processor families, please contact us.
Can TT designs be created using FPGAs?
Many reliable TT systems have been created using off-the-shelf processors (and many new designs are created in this way every day). However, if you have opted to implement your system using an FPGA, it make sense to consider using a “soft” processor which has precitable timing behaviour.
We currently offer one such core: the PH 03 core. This core is compatible with the MIPS-I instruction set architecture and executes all (non-patented) integer instructions. Full (VHDL) source for this core is provided with our RapidiTTy FPGA product. This core is also included (in an encrypted form with a non-commercial license) with our RapidiTTy FPGA Lite product.
The debug and timing technology used in the PH core can also be applied to a wide range of different processors. Please contact us for further details.
Can TT designs be created using PC hardware?
Many developers use PC platforms for rapid prototyping of embedded software. In addition, where power requirements and size requirements are not unduly restrictive, some developers like to deploy applications based on “embedded PC” hardware.
Whether for prototyping or deployment, creation of TT designs using PC hardware is fully supported by our RapidiTTy™ PC product.
Do TT techniques work with multi-processor systems?
TT techniques are very effective with both single-processor and multi-processor designs (including distributed systems and multi-core systems).
Using TT architectures with off-the-shelf protocols can have significant advantages. For example, the Controller Area Network (CAN) bus is currently used in automotive, industrial and medical systems. Because of its popularity, hardware support for this protocol is provided in many off-the-shelf microcontrollers. In most cases, CAN is considered to be suitable for use only in systems with — at best — a safety integrity level (SIL) of 1 (“SIL 1 systems”). Recent studies have demonstrated that through the appropriate use of TT techniques, systems can be produced with SIL 2 ratings (single-bus designs) or SIL 3 ratings (dual-bus designs).
Our RapidiTTy™ Builder product provides full support for the creation of distributed TT designs based on the CAN protocol.
Are there any introductory books on TT technology?
Basic techniques for implementing time-triggered embedded systems are presented in the books discussed on our books pages.